[arch][arm64] restructure some start.S to allow KERNEL_VM and WITH_SMP
Currently only supports both set at the same time, but rearrange their order such that theoretically both are pretty independent. Somewhat untested in that there's no configuration for !KERNEL_VM and WITH_SMP, but at least allows that config to be tested.
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@@ -42,7 +42,6 @@ arm_reset:
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mov tmp, #(0b11<<20)
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msr cpacr_el1, tmp
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#if WITH_KERNEL_VM
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/* enable caches so atomics and spinlocks work */
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mrs tmp, sctlr_el1
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orr tmp, tmp, #(1<<12) /* Enable icache */
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@@ -55,22 +54,27 @@ arm_reset:
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/* make sure SP_ELx is being used */
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msr spsel, #1
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#if WITH_KERNEL_VM
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/* set up the mmu according to mmu_initial_mappings */
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/* load the base of the translation table and clear the table */
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adrp page_table1, arm64_kernel_translation_table
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add page_table1, page_table1, #:lo12:arm64_kernel_translation_table
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#endif /* WITH_KERNEL_VM */
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#if WITH_SMP
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/* if the cpu id is != 0 it's a secondary cpu */
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mrs cpuid, mpidr_el1
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ubfx cpuid, cpuid, #0, #SMP_CPU_ID_BITS
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#if WITH_KERNEL_VM
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cbnz cpuid, .Lmmu_enable_secondary
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/* this path forward until .Lmmu_enable_secondary is the primary cpu only */
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#else
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cbnz cpuid, .Lsecondary_boot
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#endif
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#endif /* WITH_SMP */
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#endif /* WITH_KERNEL_VM */
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/* this path forward until .Lmmu_enable_secondary or .Lsecondary_boot is the primary cpu only */
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/* save a copy of the boot args so x0-x3 are available for use */
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adrp tmp, arm64_boot_args
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