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[arch] run astyle on arch/

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This commit is contained in:
Travis Geiselbrecht
2012-10-31 21:52:16 -07:00
parent a6c70ee683
commit 5c1df88168
16 changed files with 120 additions and 106 deletions
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8
arch/arm/arm-m/exceptions.c
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@@ -29,13 +29,13 @@ static void dump_frame(const struct cm3_exception_frame *frame)
{
printf("exception frame at %p\n", frame);
printf("\tr0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x r4 0x%08x\n",
frame->r0, frame->r1, frame->r2, frame->r3, frame->r4);
frame->r0, frame->r1, frame->r2, frame->r3, frame->r4);
printf("\tr5 0x%08x r6 0x%08x r7 0x%08x r8 0x%08x r9 0x%08x\n",
frame->r5, frame->r6, frame->r7, frame->r8, frame->r9);
frame->r5, frame->r6, frame->r7, frame->r8, frame->r9);
printf("\tr10 0x%08x r11 0x%08x r12 0x%08x\n",
frame->r10, frame->r11, frame->r12);
frame->r10, frame->r11, frame->r12);
printf("\tlr 0x%08x pc 0x%08x psr 0x%08x\n",
frame->lr, frame->pc, frame->psr);
frame->lr, frame->pc, frame->psr);
}
static void hardfault(struct cm3_exception_frame *frame)

2
arch/arm/arm-m/thread.c
View File

@@ -104,7 +104,7 @@ static void pendsv(struct cm3_exception_frame_long *frame)
arch_enable_ints();
}
/*
/*
* raw pendsv exception handler, triggered by interrupt glue to schedule
* a preemption check.
*/

3
arch/arm/arm-m/vectab.c
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@@ -36,8 +36,7 @@ extern void _pendsv(void);
extern void _pendsv(void);
extern void _systick(void);
const void * const __SECTION(".text.boot.vectab1") vectab[] =
{
const void * const __SECTION(".text.boot.vectab1") vectab[] = {
/* arm exceptions */
initial_stack + sizeof(initial_stack),
_start,

24
arch/arm/arm/faults.c
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@@ -44,11 +44,21 @@ static void dump_fault_frame(struct arm_fault_frame *frame)
// dump the bottom of the current stack
addr_t stack;
switch (frame->spsr & MODE_MASK) {
case MODE_FIQ: stack = regs.fiq_r13; break;
case MODE_IRQ: stack = regs.irq_r13; break;
case MODE_SVC: stack = regs.svc_r13; break;
case MODE_UND: stack = regs.und_r13; break;
case MODE_SYS: stack = regs.sys_r13; break;
case MODE_FIQ:
stack = regs.fiq_r13;
break;
case MODE_IRQ:
stack = regs.irq_r13;
break;
case MODE_SVC:
stack = regs.svc_r13;
break;
case MODE_UND:
stack = regs.und_r13;
break;
case MODE_SYS:
stack = regs.sys_r13;
break;
default:
stack = 0;
}
@@ -65,9 +75,9 @@ static void exception_die(struct arm_fault_frame *frame, int pc_off, const char
frame->pc += pc_off;
dprintf(CRITICAL, msg);
dump_fault_frame(frame);
halt();
for(;;);
for (;;);
}
void arm_syscall_handler(struct arm_fault_frame *frame)

6
arch/arm/arm/mmu.c
View File

@@ -55,9 +55,9 @@ void arm_mmu_map_section(addr_t paddr, addr_t vaddr, uint flags)
#if defined(PLATFORM_MSM7K)
if ((paddr >= 0x88000000) && (paddr < 0xD0000000)) {
/* peripherals in the 0x88000000 - 0xD0000000 range must
* be mapped as DEVICE NON-SHARED: TEX=2, C=0, B=0
*/
/* peripherals in the 0x88000000 - 0xD0000000 range must
* be mapped as DEVICE NON-SHARED: TEX=2, C=0, B=0
*/
TEX = 2;
flags &= (~(MMU_FLAG_CACHED | MMU_FLAG_BUFFERED));
}

2
arch/arm/arm/thread.c
View File

@@ -75,7 +75,7 @@ void arch_thread_initialize(thread_t *t)
// fill it in
memset(frame, 0, sizeof(*frame));
frame->lr = (vaddr_t)&initial_thread_func;
// set the stack pointer
t->arch.sp = (vaddr_t)frame;
}

3
arch/arm/include/arch/arm.h
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@@ -34,7 +34,8 @@ __BEGIN_CDECLS
void arm_context_switch(vaddr_t *old_sp, vaddr_t new_sp);
static inline uint32_t read_cpsr() {
static inline uint32_t read_cpsr()
{
uint32_t cpsr;
__asm__ volatile("mrs %0, cpsr" : "=r" (cpsr));

4
arch/arm/include/arch/arm/cores.h
View File

@@ -23,8 +23,8 @@
#ifndef __ARM_CORES_H
#define __ARM_CORES_H
/*
* make the gcc built in define a little easier to deal with
/*
* make the gcc built in define a little easier to deal with
* to decide what core it is generating code for
*
* ARM_ARCH_LEVEL gets assigned a numeric value of the general family

2
arch/arm/include/arch/arm/ops.h
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@@ -150,7 +150,7 @@ __GNU_INLINE __ALWAYS_INLINE extern inline uint32_t arch_cycle_count(void)
{
#if ARM_CPU_CORTEX_M3
#define DWT_CYCCNT (0xE0001004)
return *REG32(DWT_CYCCNT);
return *REG32(DWT_CYCCNT);
#else
return 0;
#endif

10
arch/x86/arch.c
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@@ -37,12 +37,12 @@ void arch_early_init(void)
x86_mmu_init();
platform_init_mmu_mappings();
/* enable caches here for now */
clear_in_cr0(X86_CR0_NW | X86_CR0_CD);
memset(&system_tss, 0, sizeof(tss_t));
system_tss.esp0 = 0;
system_tss.ss0 = DATA_SELECTOR;
system_tss.ss1 = 0;
@@ -50,7 +50,7 @@ void arch_early_init(void)
system_tss.eflags = 0x00003002;
system_tss.bitmap = offsetof(tss_t, tss_bitmap);
system_tss.trace = 1; // trap on hardware task switch
set_global_desc(TSS_SELECTOR, &system_tss, sizeof(tss_t), 1, 0, 0, SEG_TYPE_TSS, 0, 0);
x86_ltr(TSS_SELECTOR);
@@ -64,7 +64,7 @@ uint32_t arch_cycle_count(void)
{
uint32_t timestamp;
rdtscl(timestamp);
return timestamp;
}

20
arch/x86/descriptor.c
View File

@@ -29,25 +29,25 @@ typedef struct {
uint16_t limit_15_0;
uint16_t base_15_0;
uint8_t base_23_16;
uint8_t type : 4;
uint8_t s : 1;
uint8_t dpl : 2;
uint8_t p : 1;
uint8_t limit_19_16 : 4;
uint8_t avl : 1;
uint8_t reserved_0 : 1;
uint8_t d_b : 1;
uint8_t g : 1;
uint8_t base_31_24;
} __PACKED seg_desc_t;
extern seg_desc_t _gdt[];
void set_global_desc(seg_sel_t sel, void *base, uint32_t limit,
uint8_t present, uint8_t ring, uint8_t sys, uint8_t type, uint8_t gran, uint8_t bits)
uint8_t present, uint8_t ring, uint8_t sys, uint8_t type, uint8_t gran, uint8_t bits)
{
// convert selector into index
uint16_t index = sel >> 3;
@@ -59,10 +59,10 @@ void set_global_desc(seg_sel_t sel, void *base, uint32_t limit,
_gdt[index].base_23_16 = (((uint32_t) base) & 0x00ff0000) >> 16;
_gdt[index].base_31_24 = ((uint32_t) base) >> 24;
_gdt[index].type = type & 0x0f; // segment type
_gdt[index].p = present != 0; // present
_gdt[index].dpl = ring & 0x03; // descriptor privilege level
_gdt[index].g = gran != 0; // granularity
_gdt[index].s = sys != 0; // system / non-system
_gdt[index].d_b = bits != 0; // 16 / 32 bit
_gdt[index].type = type & 0x0f; // segment type
_gdt[index].p = present != 0; // present
_gdt[index].dpl = ring & 0x03; // descriptor privilege level
_gdt[index].g = gran != 0; // granularity
_gdt[index].s = sys != 0; // system / non-system
_gdt[index].d_b = bits != 0; // 16 / 32 bit
}

16
arch/x86/faults.c
View File

@@ -27,13 +27,13 @@
static void dump_fault_frame(struct x86_iframe *frame)
{
dprintf(CRITICAL, " CS: %04x EIP: %08x EFL: %08x CR2: %08x\n",
frame->cs, frame->eip, frame->eflags, x86_get_cr2());
frame->cs, frame->eip, frame->eflags, x86_get_cr2());
dprintf(CRITICAL, "EAX: %08x ECX: %08x EDX: %08x EBX: %08x\n",
frame->eax, frame->ecx, frame->edx, frame->ebx);
frame->eax, frame->ecx, frame->edx, frame->ebx);
dprintf(CRITICAL, "ESP: %08x EBP: %08x ESI: %08x EDI: %08x\n",
frame->esp, frame->ebp, frame->esi, frame->edi);
frame->esp, frame->ebp, frame->esi, frame->edi);
dprintf(CRITICAL, " DS: %04x ES: %04x FS: %04x GS: %04x\n",
frame->ds, frame->es, frame->fs, frame->gs);
frame->ds, frame->es, frame->fs, frame->gs);
// dump the bottom of the current stack
addr_t stack = (addr_t) frame; //(addr_t) (((uint32_t *) frame) + (sizeof(struct x86_iframe) / sizeof(uint32_t) - 1));
@@ -49,7 +49,7 @@ static void exception_die(struct x86_iframe *frame, const char *msg)
inc_critical_section();
dprintf(CRITICAL, msg);
dump_fault_frame(frame);
for (;;) {
x86_cli();
x86_hlt();
@@ -63,15 +63,15 @@ void x86_syscall_handler(struct x86_iframe *frame)
void x86_gpf_handler(struct x86_iframe *frame)
{
exception_die(frame, "unhandled gpf, halting\n");
exception_die(frame, "unhandled gpf, halting\n");
}
void x86_invop_handler(struct x86_iframe *frame)
{
exception_die(frame, "unhandled invalid op, halting\n");
exception_die(frame, "unhandled invalid op, halting\n");
}
void x86_unhandled_exception(struct x86_iframe *frame)
{
exception_die(frame, "unhandled exception, halting\n");
exception_die(frame, "unhandled exception, halting\n");
}

2
arch/x86/include/arch/arch_thread.h
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@@ -25,7 +25,7 @@
struct arch_thread {
vaddr_t esp;
// TODO: fpu context
};

92
arch/x86/include/arch/x86.h
View File

@@ -31,53 +31,54 @@ __BEGIN_CDECLS
void x86_mmu_init(void);
struct x86_iframe {
uint32_t pivot; // stack switch pivot
uint32_t edi, esi, ebp, esp, ebx, edx, ecx, eax; // pushed by common handler using pusha
uint32_t ds, es, fs, gs; // pushed by common handler
uint32_t vector; // pushed by stub
uint32_t err_code; // pushed by interrupt or stub
uint32_t eip, cs, eflags; // pushed by interrupt
uint32_t user_esp, user_ss; // pushed by interrupt if priv change occurs
uint32_t pivot; // stack switch pivot
uint32_t edi, esi, ebp, esp, ebx, edx, ecx, eax; // pushed by common handler using pusha
uint32_t ds, es, fs, gs; // pushed by common handler
uint32_t vector; // pushed by stub
uint32_t err_code; // pushed by interrupt or stub
uint32_t eip, cs, eflags; // pushed by interrupt
uint32_t user_esp, user_ss; // pushed by interrupt if priv change occurs
};
/*
* x86 TSS structure
*/
typedef struct {
uint16_t backlink, __blh;
uint32_t esp0;
uint16_t ss0, __ss0h;
uint32_t esp1;
uint16_t ss1, __ss1h;
uint32_t esp2;
uint16_t ss2, __ss2h;
uint32_t cr3;
uint32_t eip;
uint32_t eflags;
uint32_t eax, ecx, edx, ebx;
uint32_t esp, ebp, esi, edi;
uint16_t es, __esh;
uint16_t cs, __csh;
uint16_t ss, __ssh;
uint16_t ds, __dsh;
uint16_t fs, __fsh;
uint16_t gs, __gsh;
uint16_t ldt, __ldth;
uint16_t trace, bitmap;
uint16_t backlink, __blh;
uint32_t esp0;
uint16_t ss0, __ss0h;
uint32_t esp1;
uint16_t ss1, __ss1h;
uint32_t esp2;
uint16_t ss2, __ss2h;
uint32_t cr3;
uint32_t eip;
uint32_t eflags;
uint32_t eax, ecx, edx, ebx;
uint32_t esp, ebp, esi, edi;
uint16_t es, __esh;
uint16_t cs, __csh;
uint16_t ss, __ssh;
uint16_t ds, __dsh;
uint16_t fs, __fsh;
uint16_t gs, __gsh;
uint16_t ldt, __ldth;
uint16_t trace, bitmap;
uint8_t tss_bitmap[8192];
} __PACKED tss_t;
#define X86_CR0_PE 0x00000001 /* protected mode enable */
#define X86_CR0_MP 0x00000002 /* monitor coprocessor */
#define X86_CR0_EM 0x00000004 /* emulation */
#define X86_CR0_TS 0x00000008 /* task switched */
#define X86_CR0_WP 0x00010000 /* supervisor write protect */
#define X86_CR0_NW 0x20000000 /* not write-through */
#define X86_CR0_CD 0x40000000 /* cache disable */
#define X86_CR0_PG 0x80000000 /* enable paging */
#define X86_CR0_PE 0x00000001 /* protected mode enable */
#define X86_CR0_MP 0x00000002 /* monitor coprocessor */
#define X86_CR0_EM 0x00000004 /* emulation */
#define X86_CR0_TS 0x00000008 /* task switched */
#define X86_CR0_WP 0x00010000 /* supervisor write protect */
#define X86_CR0_NW 0x20000000 /* not write-through */
#define X86_CR0_CD 0x40000000 /* cache disable */
#define X86_CR0_PG 0x80000000 /* enable paging */
static inline void set_in_cr0(uint32_t mask) {
static inline void set_in_cr0(uint32_t mask)
{
__asm__ __volatile__ (
"movl %%cr0,%%eax \n\t"
"orl %0,%%eax \n\t"
@@ -86,7 +87,8 @@ static inline void set_in_cr0(uint32_t mask) {
:"ax");
}
static inline void clear_in_cr0(uint32_t mask) {
static inline void clear_in_cr0(uint32_t mask)
{
__asm__ __volatile__ (
"movl %%cr0, %%eax \n\t"
"andl %0, %%eax \n\t"
@@ -99,18 +101,20 @@ static inline void x86_clts(void) {__asm__ __volatile__ ("clts"); }
static inline void x86_hlt(void) {__asm__ __volatile__ ("hlt"); }
static inline void x86_sti(void) {__asm__ __volatile__ ("sti"); }
static inline void x86_cli(void) {__asm__ __volatile__ ("cli"); }
static inline void x86_ltr(uint16_t sel) {
static inline void x86_ltr(uint16_t sel)
{
__asm__ __volatile__ ("ltr %%ax" :: "a" (sel));
}
static inline uint32_t x86_get_cr2(void) {
static inline uint32_t x86_get_cr2(void)
{
uint32_t rv;
__asm__ __volatile__ (
"movl %%cr2, %0"
: "=r" (rv)
"movl %%cr2, %0"
: "=r" (rv)
);
return rv;
}

22
arch/x86/include/arch/x86/descriptor.h
View File

@@ -28,10 +28,10 @@
/*
* System Selectors
*/
#define CODE_SELECTOR 0x08
#define DATA_SELECTOR 0x10
#define VIDEO_SELECTOR 0x18
#define TSS_SELECTOR 0x30
#define CODE_SELECTOR 0x08
#define DATA_SELECTOR 0x10
#define VIDEO_SELECTOR 0x18
#define TSS_SELECTOR 0x30
#define USER_CODE_SELECTOR 0x23
#define USER_DATA_SELECTOR 0x2b
@@ -39,16 +39,16 @@
/*
* Descriptor Types
*/
#define SEG_TYPE_TSS 0x9
#define SEG_TYPE_TSS_BUSY 0xb
#define SEG_TYPE_TASK_GATE 0x5
#define SEG_TYPE_INT_GATE 0xe // 32 bit
#define SEG_TYPE_DATA_RW 0x2
#define SEG_TYPE_CODE_RW 0xa
#define SEG_TYPE_TSS 0x9
#define SEG_TYPE_TSS_BUSY 0xb
#define SEG_TYPE_TASK_GATE 0x5
#define SEG_TYPE_INT_GATE 0xe // 32 bit
#define SEG_TYPE_DATA_RW 0x2
#define SEG_TYPE_CODE_RW 0xa
typedef uint16_t seg_sel_t;
void set_global_desc(seg_sel_t sel, void *base, uint32_t limit,
uint8_t present, uint8_t ring, uint8_t sys, uint8_t type, uint8_t gran, uint8_t bits);
uint8_t present, uint8_t ring, uint8_t sys, uint8_t type, uint8_t gran, uint8_t bits);
#endif

10
arch/x86/thread.c
View File

@@ -29,9 +29,9 @@
#include <arch/x86/descriptor.h>
/*struct context_switch_frame {
uint32_t edi, esi, ebp, esp, ebx, edx, ecx, eax;
uint32_t ds, es, fs, gs;
uint32_t eip, cs, eflags;
uint32_t edi, esi, ebp, esp, ebx, edx, ecx, eax;
uint32_t ds, es, fs, gs;
uint32_t eip, cs, eflags;
};*/
struct context_switch_frame {
uint32_t edi, esi, ebp, esp, ebx, edx, ecx, eax;
@@ -72,7 +72,7 @@ void arch_thread_initialize(thread_t *t)
// fill it in
memset(frame, 0, sizeof(*frame));
frame->eip = (vaddr_t) &initial_thread_func;
frame->eflags = 0x3002; // IF = 0, NT = 0, IOPL = 3
//frame->cs = CODE_SELECTOR;
@@ -80,7 +80,7 @@ void arch_thread_initialize(thread_t *t)
//frame->gs = DATA_SELECTOR;
//frame->es = DATA_SELECTOR;
//frame->ds = DATA_SELECTOR;
// set the stack pointer
t->arch.esp = (vaddr_t)frame;
}