[target][dartuinoP0] Dartuino bringup. New target.
This commit is contained in:
committed by
Travis Geiselbrecht
parent
6216532654
commit
541754a397
28
target/dartuinoP0/include/target/debugconfig.h
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28
target/dartuinoP0/include/target/debugconfig.h
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/*
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* Copyright (c) 2012 Travis Geiselbrecht
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __TARGET_DEBUGCONFIG_H
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#define __TARGET_DEBUGCONFIG_H
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#define DEBUG_UART 3
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#endif
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31
target/dartuinoP0/include/target/gpioconfig.h
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target/dartuinoP0/include/target/gpioconfig.h
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/*
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* Copyright (c) 2012 Travis Geiselbrecht
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __TARGET_GPIOCONFIG_H
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#define __TARGET_GPIOCONFIG_H
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#include <platform/gpio.h>
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#define GPIO_USART3_TX GPIO(GPIO_PORT_B, 10)
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#define GPIO_USART3_RX GPIO(GPIO_PORT_B, 11)
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#endif
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193
target/dartuinoP0/init.c
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target/dartuinoP0/init.c
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/*
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* Copyright (c) 2015 Travis Geiselbrecht
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <err.h>
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#include <stdlib.h>
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#include <debug.h>
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#include <trace.h>
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#include <target.h>
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#include <compiler.h>
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#include <dev/gpio.h>
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#include <platform/stm32.h>
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#include <platform/sdram.h>
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#include <platform/gpio.h>
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#include <platform/eth.h>
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#include <target/debugconfig.h>
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#include <target/gpioconfig.h>
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#include <reg.h>
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#if WITH_LIB_MINIP
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#include <lib/minip.h>
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#endif
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const sdram_config_t target_sdram_config = {
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.bus_width = SDRAM_BUS_WIDTH_16,
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.cas_latency = SDRAM_CAS_LATENCY_2,
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.col_bits_num = SDRAM_COLUMN_BITS_8
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};
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void target_early_init(void)
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{
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#if DEBUG_UART == 3
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/* configure usart 3 pins */
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gpio_config(GPIO_USART3_TX, GPIO_STM32_AF | GPIO_STM32_AFn(GPIO_AF7_USART3) | GPIO_PULLUP);
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gpio_config(GPIO_USART3_RX, GPIO_STM32_AF | GPIO_STM32_AFn(GPIO_AF7_USART3) | GPIO_PULLUP);
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#else
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#error need to configure gpio pins for debug uart
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#endif
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/* now that the uart gpios are configured, enable the debug uart */
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stm32_debug_early_init();
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/* The lcd framebuffer starts at the base of SDRAM */
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}
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static uint8_t* gen_mac_address(void) {
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static uint8_t mac_addr[6];
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for (size_t i = 0; i < sizeof(mac_addr); i++) {
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mac_addr[i] = rand() & 0xff;
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}
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mac_addr[5] += 1;
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/* unicast and locally administered */
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mac_addr[0] &= ~(1<<0);
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mac_addr[0] |= (1<<1);
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return mac_addr;
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}
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void target_init(void)
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{
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uint8_t* mac_addr = gen_mac_address();
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stm32_debug_init();
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eth_init(mac_addr, PHY_KSZ8721);
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#if WITH_LIB_MINIP
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minip_set_macaddr(mac_addr);
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uint32_t ip_addr = IPV4(192, 168, 0, 98);
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uint32_t ip_mask = IPV4(255, 255, 255, 0);
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uint32_t ip_gateway = IPV4_NONE;
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minip_init(stm32_eth_send_minip_pkt, NULL, ip_addr, ip_mask, ip_gateway);
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#endif
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}
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/**
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* @brief Initializes SDRAM GPIO.
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* called back from stm32_sdram_init
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*/
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void stm_sdram_GPIO_init(void)
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{
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GPIO_InitTypeDef gpio_init_structure;
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/* Enable GPIOs clock */
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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__HAL_RCC_GPIOE_CLK_ENABLE();
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__HAL_RCC_GPIOF_CLK_ENABLE();
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__HAL_RCC_GPIOG_CLK_ENABLE();
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__HAL_RCC_GPIOH_CLK_ENABLE();
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/* Common GPIO configuration */
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gpio_init_structure.Mode = GPIO_MODE_AF_PP;
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gpio_init_structure.Pull = GPIO_PULLUP;
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gpio_init_structure.Speed = GPIO_SPEED_FAST;
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gpio_init_structure.Alternate = GPIO_AF12_FMC;
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/* GPIOC configuration */
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gpio_init_structure.Pin = GPIO_PIN_3;
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HAL_GPIO_Init(GPIOC, &gpio_init_structure);
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/* GPIOD configuration */
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gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3 | GPIO_PIN_8| GPIO_PIN_9 | GPIO_PIN_10 |\
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GPIO_PIN_14 | GPIO_PIN_15;
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HAL_GPIO_Init(GPIOD, &gpio_init_structure);
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/* GPIOE configuration */
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gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7| GPIO_PIN_8 | GPIO_PIN_9 |\
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GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
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GPIO_PIN_15;
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HAL_GPIO_Init(GPIOE, &gpio_init_structure);
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/* GPIOF configuration */
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gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2| GPIO_PIN_3 | GPIO_PIN_4 |\
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GPIO_PIN_5 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
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GPIO_PIN_15;
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HAL_GPIO_Init(GPIOF, &gpio_init_structure);
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/* GPIOG configuration */
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gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4| GPIO_PIN_5 | GPIO_PIN_8 |\
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GPIO_PIN_15;
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HAL_GPIO_Init(GPIOG, &gpio_init_structure);
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/* GPIOH configuration */
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gpio_init_structure.Pin = GPIO_PIN_3 | GPIO_PIN_5;
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HAL_GPIO_Init(GPIOH, &gpio_init_structure);
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}
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/**
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* @brief Initializes the ETH MSP.
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* @param heth: ETH handle
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* @retval None
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*/
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/* called back from the HAL_ETH_Init routine */
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void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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/* Enable GPIOs clocks */
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOG_CLK_ENABLE();
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/* Ethernet pins configuration ************************************************/
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/*
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RMII_REF_CLK ----------------------> PA1
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RMII_MDIO -------------------------> PA2
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RMII_MDC --------------------------> PC1
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RMII_MII_CRS_DV -------------------> PA7
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RMII_MII_RXD0 ---------------------> PC4
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RMII_MII_RXD1 ---------------------> PC5
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RMII_MII_TX_EN --------------------> PG11
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RMII_MII_TXD0 ---------------------> PG13
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RMII_MII_TXD1 ---------------------> PG14
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*/
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/* Configure PA1, PA2 and PA7 */
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GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
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GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
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GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
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/* Configure PC1, PC4 and PC5 */
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GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
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/* Configure PG2, PG11, PG13 and PG14 */
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GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
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HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
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}
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33
target/dartuinoP0/rules.mk
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33
target/dartuinoP0/rules.mk
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LOCAL_DIR := $(GET_LOCAL_DIR)
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MODULE := $(LOCAL_DIR)
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STM32_CHIP := stm32f756
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PLATFORM := stm32f7xx
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SDRAM_SIZE := 0x00800000
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SDRAM_BASE := 0xc0000000
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GLOBAL_DEFINES += \
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ENABLE_UART3=1 \
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ENABLE_SDRAM=1 \
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USE_HSE_XTAL=1 \
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SDRAM_BASE=$(SDRAM_BASE) \
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SDRAM_SIZE=$(SDRAM_SIZE) \
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PLL_M_VALUE=8 \
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PLL_N_VALUE=336 \
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PLL_P_VALUE=2 \
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\
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PKTBUF_POOL_SIZE=16
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GLOBAL_INCLUDES += $(LOCAL_DIR)/include
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MODULE_SRCS += \
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$(LOCAL_DIR)/init.c \
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MODULE_DEPS += \
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include make/module.mk
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