lby/lk
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

[platform][stellaris] get debug receive working

Browse Source 
-Add proper vector table support
-Enable RX uart interrupt
-Get it wired up to the cbuf properly
This commit is contained in:
Travis Geiselbrecht
2013-02-06 21:42:21 -08:00
parent 733ab26ca9
commit 3911d09cf4
3 changed files with 55 additions and 188 deletions
Download Patch File Download Diff File Expand all files Collapse all files

83
platform/stellaris/debug.c
View File

@@ -38,70 +38,65 @@
#define DEBUG_UART UART0_BASE
static cbuf_t debug_rx_buf;
void stellaris_uart_irq(void)
{
inc_critical_section();
//
// Get the interrrupt status.
//
unsigned long ulStatus = UARTIntStatus(DEBUG_UART, true);
//
// Get the interrrupt status.
//
unsigned long ulStatus = UARTIntStatus(DEBUG_UART, true);
//
// Clear the asserted interrupts.
//
UARTIntClear(DEBUG_UART, ulStatus);
//
// Clear the asserted interrupts.
//
UARTIntClear(DEBUG_UART, ulStatus);
//
// Loop while there are characters in the receive FIFO.
//
while(UARTCharsAvail(DEBUG_UART)) {
//
// Read the next character from the UART and write it back to the UART.
//
unsigned char c = UARTCharGetNonBlocking(DEBUG_UART);
cbuf_write_char(&debug_rx_buf, c, false);
//
// Loop while there are characters in the receive FIFO.
//
while(UARTCharsAvail(DEBUG_UART))
{
//
// Read the next character from the UART and write it back to the UART.
//
unsigned char c = UARTCharGetNonBlocking(DEBUG_UART);
cbuf_write(&debug_rx_buf, &c, 1, false);
cm3_trigger_preempt();
}
cm3_trigger_preempt();
}
dec_critical_section();
}
void stellaris_debug_early_init(void)
{
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
// Set GPIO A0 and A1 as UART pins.
//
GPIOPinConfigure(GPIO_PA0_U0RX);
GPIOPinConfigure(GPIO_PA1_U0TX);
GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
// Set GPIO A0 and A1 as UART pins.
//
GPIOPinConfigure(GPIO_PA0_U0RX);
GPIOPinConfigure(GPIO_PA1_U0TX);
GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
UARTConfigSetExpClk(DEBUG_UART, SysCtlClockGet(), 115200, UART_CONFIG_WLEN_8|UART_CONFIG_STOP_ONE|UART_CONFIG_PAR_NONE);
UARTEnable(DEBUG_UART);
UARTConfigSetExpClk(DEBUG_UART, SysCtlClockGet(), 115200, UART_CONFIG_WLEN_8|UART_CONFIG_STOP_ONE|UART_CONFIG_PAR_NONE);
UARTEnable(DEBUG_UART);
}
void stellaris_debug_init(void)
{
//
// Enable the UART interrupt.
//
//ROM_IntEnable(INT_UART0);
UARTIntEnable(DEBUG_UART, UART_INT_RX | UART_INT_RT);
cbuf_initialize(&debug_rx_buf, 16);
//
// Enable the UART interrupt.
//
//ROM_IntEnable(INT_UART0);
UARTIntEnable(DEBUG_UART, UART_INT_RX | UART_INT_RT);
NVIC_EnableIRQ(INT_UART0 - 16);
}
@@ -111,12 +106,12 @@ void platform_dputc(char c)
_dputc('\r');
}
UARTCharPut(DEBUG_UART, c);
UARTCharPut(DEBUG_UART, c);
}
int platform_dgetc(char *c, bool wait)
{
return cbuf_read(&debug_rx_buf, c, 1, wait);
return cbuf_read_char(&debug_rx_buf, c, wait);
}
void platform_halt(void)