diff --git a/platform/zynq/debug.c b/platform/zynq/debug.c
new file mode 100644
index 00000000..5d20c8b7
--- /dev/null
+++ b/platform/zynq/debug.c
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2008-2014 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <stdarg.h>
+#include <reg.h>
+#include <stdio.h>
+#include <kernel/thread.h>
+#include <platform/debug.h>
+#include <platform/zynq.h>
+#include <reg.h>
+
+#define UART_CR (0x00)
+#define UART_MR (0x04)
+#define UART_IER (0x08)
+#define UART_IDR (0x0c)
+#define UART_IMR (0x10)
+#define UART_ISR (0x14)
+#define UART_BAUDGEN (0x18)
+#define UART_RXTOUT (0x1c)
+#define UART_RXWM (0x20)
+#define UART_MODEMCR (0x24)
+#define UART_MODEMSR (0x28)
+#define UART_SR (0x2c)
+#define UART_FIFO (0x30)
+#define UART_BAUD_DIV (0x34)
+#define UART_FLOW_DELAY (0x38)
+#define UART_TX_FIFO_TRIGGER (0x44)
+
+#define UARTREG(reg)  (*REG32(UART0_BASE + (reg)))
+
+void platform_dputc(char c)
+{
+    UARTREG(UART_FIFO) = c;
+}
+
+int platform_dgetc(char *c, bool wait)
+{
+    if (!wait) {
+        if (UARTREG(UART_SR) & (1<<1)) {
+            /* fifo empty */
+            return -1;
+        }
+        *c = UARTREG(UART_FIFO) & 0xff;
+        return 0;
+    } else {
+        while ((UARTREG(UART_SR) & (1<<1))) {
+            // XXX actually block on interrupt
+            thread_yield();
+        }
+
+        *c = UARTREG(UART_FIFO) & 0xff;
+        return 0;
+    }
+}
+
+void platform_halt(void)
+{
+    arch_disable_ints();
+    for (;;);
+}
+
+
+void platform_early_init_debug(void)
+{
+    UARTREG(UART_CR) = (1<<4)|(1<<2); // txen,rxen
+}
diff --git a/platform/zynq/include/platform/zynq.h b/platform/zynq/include/platform/zynq.h
new file mode 100644
index 00000000..36964a49
--- /dev/null
+++ b/platform/zynq/include/platform/zynq.h
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2014 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#pragma once
+
+#include <reg.h>
+
+/* hardware base addresses */
+#define UART0_BASE (0xe0000000)
+#define UART1_BASE (0xe0001000)
+#define USB0_BASE  (0xe0002000)
+#define USB1_BASE  (0xe0003000)
+#define I2C0_BASE  (0xe0004000)
+#define I2C1_BASE  (0xe0005000)
+#define SPI0_BASE  (0xe0006000)
+#define SPI1_BASE  (0xe0007000)
+#define CAN0_BASE  (0xe0008000)
+#define CAN1_BASE  (0xe0009000)
+#define GPIO_BASE  (0xe000a000)
+#define GEM0_BASE  (0xe000b000) // gigabit eth controller
+#define GEM1_BASE  (0xe000c000) // ""
+#define QSPI_BASE  (0xe000d000)
+#define SMCC_BASE  (0xe000e000) // PL353 shared memory controller
+
+#define SD0_BASE   (0xe0100000)
+#define SD1_BASE   (0xe0101000)
+
+#define SLCR_BASE  (0xf8000000)
+#define TTC0_BASE  (0xf8001000)
+#define TTC1_BASE  (0xf8002000)
+#define DMAC0_NS_BASE (0xf8004000)
+#define DMAC0_S_BASE (0xf8003000)
+#define SWDT_BASE  (0xf8005000)
+
+#define CPUPRIV_BASE      (0xf8f00000)
+#define SCU_CONTROL_BASE  (CPUPRIV_BASE + 0x0000)
+#define GIC_PROC_BASE     (CPUPRIV_BASE + 0x0100)
+#define GLOBAL_TIMER_BASE (CPUPRIV_BASE + 0x0200)
+#define PRIV_TIMER_BASE   (CPUPRIV_BASE + 0x0600)
+#define GIC_DISTRIB_BASE  (CPUPRIV_BASE + 0x1000)
+#define L2CACHE_BASE      (CPUPRIV_BASE + 0x2000)
+
+#if 0
+#define TIMER0 (0x10011000)
+#define TIMER1 (0x10011020)
+#define TIMER2 (0x10012000)
+#define TIMER3 (0x10012020)
+#define TIMER4 (0x10018000)
+#define TIMER5 (0x10018020)
+#define TIMER6 (0x10019000)
+#define TIMER7 (0x10019020)
+#endif
+
+/* interrupts */
+#define TTC0_A_INT  42
+#define TTC0_B_INT  43
+#define TTC0_C_INT  44
+#define UART0_INT   59
+#define UART1_INT   81
+#define TTC1_A_INT  69
+#define TTC2_B_INT  70
+#define TTC3_C_INT  71
+
+#define MAX_INT 96
+
diff --git a/platform/zynq/interrupts.c b/platform/zynq/interrupts.c
new file mode 100644
index 00000000..9a1cd0dd
--- /dev/null
+++ b/platform/zynq/interrupts.c
@@ -0,0 +1,243 @@
+/*
+ * Copyright (c) 2014 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <err.h>
+#include <sys/types.h>
+#include <debug.h>
+#include <trace.h>
+#include <reg.h>
+#include <kernel/thread.h>
+#include <kernel/debug.h>
+#include <platform/interrupts.h>
+#include <arch/ops.h>
+#include <arch/arm.h>
+#include <platform/zynq.h>
+#include "platform_p.h"
+
+/* driver for GIC */
+
+#define LOCAL_TRACE 0
+
+struct int_handler_struct {
+    int_handler handler;
+    void *arg;
+};
+
+static struct int_handler_struct int_handler_table[MAX_INT];
+
+void register_int_handler(unsigned int vector, int_handler handler, void *arg)
+{
+    if (vector >= MAX_INT)
+        panic("register_int_handler: vector out of range %d\n", vector);
+
+    enter_critical_section();
+
+    int_handler_table[vector].handler = handler;
+    int_handler_table[vector].arg = arg;
+
+    exit_critical_section();
+}
+
+#define GICCPUREG(reg) (*REG32(GIC_PROC_BASE + (reg)))
+#define GICDISTREG(reg) (*REG32(GIC_DISTRIB_BASE + (reg)))
+
+/* main cpu regs */
+#define CONTROL  (0x00)
+#define PMR      (0x04)
+#define BR       (0x08)
+#define IAR      (0x0c)
+#define EOIR     (0x10)
+#define RPR      (0x14)
+#define HPPIR    (0x18)
+#define ABPR     (0x1c)
+#define AIAR     (0x20)
+#define AEOIR    (0x24)
+#define AHPPIR   (0x28)
+
+/* distribution regs */
+#define DISTCONTROL (0x000)
+#define GROUP       (0x080)
+#define SETENABLE   (0x100)
+#define CLRENABLE   (0x180)
+#define SETPEND     (0x200)
+#define CLRPEND     (0x280)
+#define SETACTIVE   (0x300)
+#define CLRACTIVE   (0x380)
+#define PRIORITY    (0x400)
+#define _TARGET     (0x800)
+#define CONFIG      (0xc00)
+#define NSACR       (0xe00)
+#define SGIR        (0xf00)
+
+static void gic_set_enable(uint vector, bool enable)
+{
+    if (enable) {
+        uint regoff = SETENABLE + 4 * (vector / 32);
+        GICDISTREG(regoff) = (1 << (vector % 32));
+    } else {
+        uint regoff = CLRENABLE + 4 * (vector / 32);
+        GICDISTREG(regoff) = (1 << (vector % 32));
+    }
+}
+
+void platform_init_interrupts(void)
+{
+    GICDISTREG(DISTCONTROL) = 0;
+
+    GICDISTREG(CLRENABLE) = 0xffff0000;
+    GICDISTREG(SETENABLE) = 0x0000ffff;
+    GICDISTREG(CLRPEND) = 0xffffffff;
+    GICDISTREG(GROUP) = 0;
+    GICCPUREG(PMR) = 0xf0;
+
+    for (int i = 0; i < 32 / 4; i++) {
+        GICDISTREG(PRIORITY + i * 4) = 0x80808080;
+    }
+
+    for (int i = 32/16; i < MAX_INT / 16; i++) {
+        GICDISTREG(NSACR + i * 4) = 0xffffffff;
+    }
+    for (int i = 32/32; i < MAX_INT / 32; i++) {
+        GICDISTREG(CLRENABLE + i * 4) = 0xffffffff;
+        GICDISTREG(CLRPEND + i * 4) = 0xffffffff;
+        GICDISTREG(GROUP + i * 4) = 0;
+    }
+
+    for (int i = 32/4; i < MAX_INT / 4; i++) {
+        GICDISTREG(_TARGET + i * 4) = 0;
+        GICDISTREG(PRIORITY + i * 4) = 0x80808080;
+    }
+
+    GICDISTREG(DISTCONTROL) = 1; // enable GIC0, IRQ only
+    GICCPUREG(CONTROL) = (0<<3)|(0<<2)||1; // enable GIC0, IRQ only, group 0 set to IRQ
+
+#if 0
+    hexdump((void *)GIC_PROC_BASE, 0x20);
+    hexdump((void *)GIC_DISTRIB_BASE, 0x10);
+    printf("config:   "); hexdump((void *)GIC_DISTRIB_BASE + CONFIG, 0x10);
+    printf("group:    "); hexdump((void *)GIC_DISTRIB_BASE + GROUP, 0x10);
+    printf("priority: "); hexdump((void *)GIC_DISTRIB_BASE + PRIORITY, 0x40);
+    printf("enable:   "); hexdump((void *)GIC_DISTRIB_BASE + SETENABLE, 0x10);
+    printf("pending:  "); hexdump((void *)GIC_DISTRIB_BASE + SETPEND, 0x10);
+    printf("active:   "); hexdump((void *)GIC_DISTRIB_BASE + SETACTIVE, 0x10);
+
+    // trigger interrupt
+    gic_set_enable(34, true);
+    //GICDISTREG(SETPEND + 4) = (1<<2);
+    //GICDISTREG(SETACTIVE + 4) = (1<<2);
+    GICDISTREG(SGIR) = (2 << 24) | 1;
+
+    printf("ISR 0x%x\n", (uint32_t)ARM64_READ_SYSREG(isr_el1));
+
+    printf("daif 0x%x\n", (uint32_t)ARM64_READ_SYSREG(daif));
+    arch_enable_interrupts();
+
+    printf("daif 0x%x\n", (uint32_t)ARM64_READ_SYSREG(daif));
+#endif
+}
+
+status_t mask_interrupt(unsigned int vector)
+{
+    if (vector >= MAX_INT)
+        return -1;
+
+    enter_critical_section();
+
+    gic_set_enable(vector, false);
+
+    exit_critical_section();
+
+    return NO_ERROR;
+}
+
+status_t unmask_interrupt(unsigned int vector)
+{
+    if (vector >= MAX_INT)
+        return -1;
+
+    enter_critical_section();
+
+    gic_set_enable(vector, true);
+
+    exit_critical_section();
+
+    return NO_ERROR;
+}
+
+enum handler_return platform_irq(struct arm_iframe *frame)
+{
+    uint32_t iar = GICCPUREG(IAR);
+    uint vector = iar & 0x3ff;
+
+    if (vector >= 0x3fe) {
+        // spurious
+        return INT_NO_RESCHEDULE;
+    }
+
+    inc_critical_section();
+
+    LTRACEF("platform_irq: spsr 0x%x, pc 0x%x, currthread %p, vector %d\n", frame->spsr, frame->pc, current_thread, vector);
+
+    THREAD_STATS_INC(interrupts);
+    KEVLOG_IRQ_ENTER(vector);
+
+    // deliver the interrupt
+    enum handler_return ret;
+
+    ret = INT_NO_RESCHEDULE;
+    if (int_handler_table[vector].handler)
+        ret = int_handler_table[vector].handler(int_handler_table[vector].arg);
+
+    GICCPUREG(EOIR) = iar;
+
+    LTRACEF("platform_irq: exit %d\n", ret);
+
+    KEVLOG_IRQ_EXIT(vector);
+
+    if (ret != INT_NO_RESCHEDULE)
+        thread_preempt();
+
+    dec_critical_section();
+
+    return ret;
+}
+
+void platform_fiq(struct arm_iframe *frame)
+{
+    PANIC_UNIMPLEMENTED;
+
+    uint32_t iar = GICCPUREG(IAR);
+    uint vector = iar & 0x3ff;
+
+    //printf("fiq %d\n", vector);
+
+    if (vector >= 0x3fe) {
+        // spurious
+        return;
+    }
+
+    //shutdown();
+
+    GICCPUREG(EOIR) = iar;
+}
+
+/* vim: set ts=4 sw=4 expandtab: */
diff --git a/platform/zynq/platform.c b/platform/zynq/platform.c
new file mode 100644
index 00000000..e4001fc8
--- /dev/null
+++ b/platform/zynq/platform.c
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2012-2014 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <err.h>
+#include <debug.h>
+#include <platform.h>
+#include "platform_p.h"
+
+void platform_init_mmu_mappings(void)
+{
+}
+
+void platform_early_init(void)
+{
+    platform_early_init_debug();
+
+    /* initialize the interrupt controller */
+    platform_init_interrupts();
+
+    /* initialize the timer block */
+    platform_init_timer();
+}
+
+void platform_init(void)
+{
+}
+
diff --git a/platform/zynq/platform_p.h b/platform/zynq/platform_p.h
new file mode 100644
index 00000000..2277495f
--- /dev/null
+++ b/platform/zynq/platform_p.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2012 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef __PLATFORM_P_H
+#define __PLATFORM_P_H
+
+void platform_early_init_debug(void);
+void platform_init_interrupts(void);
+void platform_init_timer(void);
+
+#endif
+
diff --git a/platform/zynq/rules.mk b/platform/zynq/rules.mk
new file mode 100644
index 00000000..75aafd57
--- /dev/null
+++ b/platform/zynq/rules.mk
@@ -0,0 +1,27 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+MODULE := $(LOCAL_DIR)
+
+ARCH := arm
+ARM_CPU := cortex-a9
+
+GLOBAL_INCLUDES += \
+	$(LOCAL_DIR)/include
+
+MODULE_SRCS += \
+	$(LOCAL_DIR)/debug.c \
+	$(LOCAL_DIR)/interrupts.c \
+	$(LOCAL_DIR)/platform.c \
+	$(LOCAL_DIR)/timer.c
+
+MEMBASE := 0x0
+MEMSIZE := 0x10000000	# 256MB
+
+GLOBAL_DEFINES += \
+	MEMBASE=$(MEMBASE) \
+	MEMSIZE=$(MEMSIZE)
+
+LINKER_SCRIPT += \
+	$(BUILDDIR)/system-onesegment.ld
+
+include make/module.mk
diff --git a/platform/zynq/timer.c b/platform/zynq/timer.c
new file mode 100644
index 00000000..7c99bef2
--- /dev/null
+++ b/platform/zynq/timer.c
@@ -0,0 +1,130 @@
+/*
+ * Copyright (c) 2008-2012 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <debug.h>
+#include <sys/types.h>
+#include <err.h>
+#include <stdio.h>
+#include <assert.h>
+#include <trace.h>
+#include <kernel/thread.h>
+#include <platform.h>
+#include <platform/interrupts.h>
+#include <platform/timer.h>
+#include <platform/zynq.h>
+#include "platform_p.h"
+
+/* driver for Cadence triple timer counter (TTC) */
+
+#define LOCAL_TRACE 0
+
+#define TIMREG(reg)   (*REG32(TTC0_BASE + (reg)))
+#define TIMREG16(reg) (*REG16(TTC0_BASE + (reg)))
+#define TIMREG8(reg)  (*REG8(TTC0_BASE + (reg)))
+
+#define CLK_CTRL(n)     (0x00 + (n) * 4)
+#define CNT_CTRL(n)     (0x0c + (n) * 4)
+#define CNT_VAL(n)      (0x18 + (n) * 4)
+#define INTERVAL_VAL(n) (0x24 + (n) * 4)
+#define MATCH_1(n)      (0x30 + (n) * 4)
+#define MATCH_2(n)      (0x3c + (n) * 4)
+#define MATCH_3(n)      (0x48 + (n) * 4)
+#define ISR(n)          (0x54 + (n) * 4)
+#define IEN(n)          (0x60 + (n) * 4)
+#define EVT_CTRL(n)     (0x6c + (n) * 4)
+#define EVT(n)          (0x78 + (n) * 4)
+
+static platform_timer_callback t_callback;
+
+static volatile uint ticks = 0;
+static lk_time_t periodic_interval;
+
+status_t platform_set_periodic_timer(platform_timer_callback callback, void *arg, lk_time_t interval)
+{
+    enter_critical_section();
+
+    LTRACEF("callback %p, arg %p, interval %lu\n", callback, arg, interval);
+
+    t_callback = callback;
+
+    periodic_interval = interval;
+
+    uint32_t ticks = periodic_interval * 1000; /* timer is running close to 1Mhz */
+    ASSERT(ticks <= 0xffff);
+
+    TIMREG(IEN(0)) = (1<<0); // interval interrupt
+    TIMREG(INTERVAL_VAL(0)) = ticks;
+    TIMREG(CNT_CTRL(0)) = (1<<5) | (1<<4) | (1<<1); // no wave, reset, interval mode
+
+    unmask_interrupt(TTC0_A_INT);
+
+    exit_critical_section();
+
+    return NO_ERROR;
+}
+
+lk_bigtime_t current_time_hires(void)
+{
+    lk_bigtime_t time;
+
+    time = ticks * periodic_interval * 1000ULL;
+
+    return time;
+}
+
+lk_time_t current_time(void)
+{
+    lk_time_t time;
+
+    time = ticks * periodic_interval;
+
+    return time;
+}
+
+static enum handler_return platform_tick(void *arg)
+{
+    ticks++;
+
+    volatile uint32_t hole = TIMREG(ISR(0)); // ack the irq
+
+    if (t_callback) {
+        return t_callback(arg, current_time());
+    } else {
+        return INT_NO_RESCHEDULE;
+    }
+}
+
+void platform_init_timer(void)
+{
+    /* disable timers */
+    TIMREG(CNT_CTRL(0)) = 0x1;
+    TIMREG(CNT_CTRL(1)) = 0x1;
+    TIMREG(CNT_CTRL(2)) = 0x1;
+
+    TIMREG(CLK_CTRL(0)) = (6 << 1) | 1; // prescale 133Mhz/(2^7) == 1039062Hz (close to 1Mhz)
+
+    register_int_handler(TTC0_A_INT, &platform_tick, NULL);
+    register_int_handler(TTC0_B_INT, &platform_tick, NULL);
+    register_int_handler(TTC0_C_INT, &platform_tick, NULL);
+}
+
+/* vim: set ts=4 sw=4 expandtab: */
diff --git a/project/zynq-qemu-test.mk b/project/zynq-qemu-test.mk
new file mode 100644
index 00000000..f12045d0
--- /dev/null
+++ b/project/zynq-qemu-test.mk
@@ -0,0 +1,13 @@
+# top level project rules for the armemu-test project
+#
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+TARGET := zynq-qemu
+
+MODULES += \
+	app/tests \
+	app/stringtests \
+	app/shell \
+	lib/debugcommands
+
+
diff --git a/scripts/do-zynq-qemu-test b/scripts/do-zynq-qemu-test
new file mode 100755
index 00000000..fef606f5
--- /dev/null
+++ b/scripts/do-zynq-qemu-test
@@ -0,0 +1,4 @@
+#!/bin/sh
+
+make zynq-qemu-test -j4 &&
+qemu-system-arm -machine xilinx-zynq-a9 -m 256 -kernel build-zynq-qemu-test/lk.elf -nographic $@
diff --git a/target/zynq-qemu/rules.mk b/target/zynq-qemu/rules.mk
new file mode 100644
index 00000000..95eecc50
--- /dev/null
+++ b/target/zynq-qemu/rules.mk
@@ -0,0 +1,15 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+#MODULE := $(LOCAL_DIR)
+
+GLOBAL_INCLUDES += \
+	$(LOCAL_DIR)/include
+
+PLATFORM := zynq
+
+MODULES += \
+
+GLOBAL_DEFINES += \
+
+#include make/module.mk
+