[arch][riscv] remove the last of the RISCV_BOOT_HART mechanism

Now the harts are dynamically numbered, so don't need this mechanism anymore.
2020-12-30 01:09:24 -08:00
parent c2d77234c3
commit 1e50428091
5 changed files with 8 additions and 23 deletions
--- a/target/sifive-unleashed/rules.mk
+++ b/target/sifive-unleashed/rules.mk
@@ -5,10 +5,6 @@ PLATFORM := sifive
 VARIANT := sifive_u

 WITH_SMP := 1
-RISCV_BOOT_HART := 1
-# Hart 0 on this board is disabled in supervisor mode, so make sure
-# there are enough hart slots for it
-RISCV_MAX_HARTS := 5

 GLOBAL_DEFINES += SIFIVE_FREQ=500000000 # 500 MHz