WIP
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37
arch/avr32/arch.c
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37
arch/avr32/arch.c
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@@ -0,0 +1,37 @@
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/*
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* Copyright (c) 2009 Travis Geiselbrecht
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <debug.h>
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#include <arch.h>
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void arch_early_init(void)
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{
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}
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void arch_init(void)
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{
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}
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void arch_quiesce(void)
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{
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2009 Travis Geiselbrecht
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* Copyright (c) 2009-2010 Travis Geiselbrecht
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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@@ -20,13 +20,48 @@
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <platform/at32ap7.h>
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.section ".text.boot"
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.globl _start
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_start:
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mov r12, 4
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mov r12, r11
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lddpc sp, .Linit_stack_top_addr
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/* print a char */
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lddpc r0, .Luart_base
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mov r1, 'a'
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st.w r0[0x1c],r1
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0:
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mov r12, 1
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mov r11, 'a'
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rcall uart_putc
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rjmp 0b
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rcall kmain
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rjmp .
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.text
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test:
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.word 99
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.align 2
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.Luart_base:
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.long USART1_BASE
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.Linit_stack_top_addr:
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.long init_stack_top
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.section ".bss"
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.align 2
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init_stack:
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.skip 1024
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init_stack_top:
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.section ".rodata"
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.align 2
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/* define the heap end as read-only data containing the end defined in the
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* linker script. other archs that use dynamic memory length discovery can make
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* this read-write and update it during init.
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*/
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.global _heap_end
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_heap_end:
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.int _end_of_ram
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@@ -12,9 +12,9 @@ BOOTOBJS += \
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OBJS += \
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$(LOCAL_DIR)/ops.o \
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$(LOCAL_DIR)/thread.o \
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$(LOCAL_DIR)/arch.o \
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# $(LOCAL_DIR)/arch.Ao \
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$(LOCAL_DIR)/asm.o \
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# $(LOCAL_DIR)/asm.o \
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$(LOCAL_DIR)/cache.o \
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$(LOCAL_DIR)/cache-ops.o \
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$(LOCAL_DIR)/exceptions.o \
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@@ -58,6 +58,8 @@ static void call_constructors(void)
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void kmain(void) __NO_RETURN __EXTERNALLY_VISIBLE;
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void kmain(void)
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{
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puts("top of kmain\n");
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// get us into some sort of thread context
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thread_init_early();
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@@ -29,77 +29,79 @@
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#include <platform/debug.h>
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#include <arch/ops.h>
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#include <lib/cbuf.h>
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#include <platform/at32ap7.h>
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#if 0
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static cbuf_t debug_buf;
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static timer_t debug_timer;
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#endif
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static void write_uart_reg(int uart, int reg, unsigned char data)
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void write_uart_reg(int uart, int reg, unsigned char data)
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{
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unsigned long base;
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int mul = 4;
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switch(uart) {
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case 0: base = UART0_BASE; break;
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case 1: base = UART1_BASE; break;
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case 2: base = UART2_BASE; break;
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case 0: base = USART0_BASE; break;
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case 1: base = USART1_BASE; break;
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case 2: base = USART2_BASE; break;
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case 3: base = USART3_BASE; break;
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default: return;
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}
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*(volatile unsigned char *)(base + reg * mul) = data;
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*REG32(base + reg * mul) = data;
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}
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static unsigned char read_uart_reg(int uart, int reg)
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unsigned char read_uart_reg(int uart, int reg)
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{
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unsigned long base;
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int mul = 4;
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switch(uart) {
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case 0: base = UART0_BASE; break;
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case 1: base = UART1_BASE; break;
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case 2: base = UART2_BASE; break;
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case 0: base = USART0_BASE; break;
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case 1: base = USART1_BASE; break;
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case 2: base = USART2_BASE; break;
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case 3: base = USART3_BASE; break;
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default: return 0;
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}
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return *(volatile unsigned char *)(base + reg * mul);
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return *REG32(base + reg * mul);
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}
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static int uart_init(void)
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{
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/* clear the tx & rx fifo and disable */
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write_uart_reg(0, UART_FCR, 0x6);
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// write_uart_reg(0, UART_FCR, 0x6);
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return 0;
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}
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static int uart_putc(int port, char c )
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int uart_putc(int port, char c )
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{
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while (!(read_uart_reg(port, UART_LSR) & (1<<6))) // wait for the shift register to empty
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;
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// while (!(read_uart_reg(port, UART_CSR) & (1<<9))) // wait for the shift register to empty
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// ;
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write_uart_reg(port, UART_THR, c);
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// *REG32(USART1_BASE + 0x1c) = c;
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return 0;
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}
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static int uart_getc(int port, bool wait) /* returns -1 if no data available */
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{
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if (wait) {
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while (!(read_uart_reg(port, UART_LSR) & (1<<0))) // wait for data to show up in the rx fifo
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while (!(read_uart_reg(port, UART_CSR) & (1<<0))) // wait for data to show up in the rx fifo
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;
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} else {
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if (!(read_uart_reg(port, UART_LSR) & (1<<0)))
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if (!(read_uart_reg(port, UART_CSR) & (1<<0)))
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return -1;
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}
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return read_uart_reg(port, UART_RHR);
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}
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#endif
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void _dputc(char c)
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{
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#if 0
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if (c == '\n')
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uart_putc(0, '\r');
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uart_putc(0, c);
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#endif
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uart_putc(1, '\r');
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uart_putc(1, c);
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}
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#if 0
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@@ -124,6 +126,7 @@ int dgetc(char *c, bool wait)
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len = cbuf_read(&debug_buf, c, 1, wait);
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return len;
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#endif
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return 0;
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}
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void debug_dump_regs(void)
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@@ -112,5 +112,22 @@
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#define INT_USBA INT_VECTOR(31, 0)
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#define INT_EBI INT_VECTOR(32, 0)
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/* UART */
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#define UART_CR (0)
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#define UART_MR (1)
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#define UART_IER (2)
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#define UART_IDR (3)
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#define UART_IMR (4)
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#define UART_CSR (5)
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#define UART_RHR (6)
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#define UART_THR (7)
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#define UART_BRGR (8)
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#define UART_RTOR (9)
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#define UART_TTGR (10)
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#define UART_FIDI (16)
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#define UART_NER (17)
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#define UART_IFR (19)
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#define UART_MAN (20)
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#endif
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6
scripts/do-ngw100-test
Executable file
6
scripts/do-ngw100-test
Executable file
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#!/bin/sh
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export PROJECT=ngw100-test
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make &&
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cp build-ngw100-test/lk.bin /tftproot/6300A8C0.img
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