From 1b9468ebf9d0ccffc450f9517b5b1158cbabcbc4 Mon Sep 17 00:00:00 2001 From: Travis Geiselbrecht Date: Thu, 6 May 2010 12:12:05 -0700 Subject: [PATCH] WIP --- arch/avr32/arch.c | 37 ++++++++++++++++ arch/avr32/crt0.S | 47 ++++++++++++++++++--- arch/avr32/rules.mk | 4 +- kernel/main.c | 2 + platform/at32ap7/debug.c | 45 +++++++++++--------- platform/at32ap7/include/platform/at32ap7.h | 17 ++++++++ scripts/do-ngw100-test | 6 +++ 7 files changed, 129 insertions(+), 29 deletions(-) create mode 100644 arch/avr32/arch.c create mode 100755 scripts/do-ngw100-test diff --git a/arch/avr32/arch.c b/arch/avr32/arch.c new file mode 100644 index 00000000..517ee246 --- /dev/null +++ b/arch/avr32/arch.c @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2009 Travis Geiselbrecht + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files + * (the "Software"), to deal in the Software without restriction, + * including without limitation the rights to use, copy, modify, merge, + * publish, distribute, sublicense, and/or sell copies of the Software, + * and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +#include +#include + +void arch_early_init(void) +{ +} + +void arch_init(void) +{ +} + +void arch_quiesce(void) +{ +} + diff --git a/arch/avr32/crt0.S b/arch/avr32/crt0.S index 03d51dd6..5261824d 100644 --- a/arch/avr32/crt0.S +++ b/arch/avr32/crt0.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009 Travis Geiselbrecht + * Copyright (c) 2009-2010 Travis Geiselbrecht * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files @@ -20,13 +20,48 @@ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ +#include + .section ".text.boot" .globl _start _start: - mov r12, 4 - mov r12, r11 + lddpc sp, .Linit_stack_top_addr + + /* print a char */ + lddpc r0, .Luart_base + mov r1, 'a' + st.w r0[0x1c],r1 + +0: + mov r12, 1 + mov r11, 'a' + rcall uart_putc + rjmp 0b + + rcall kmain rjmp . -.text -test: - .word 99 +.align 2 +.Luart_base: + .long USART1_BASE + +.Linit_stack_top_addr: + .long init_stack_top + +.section ".bss" +.align 2 +init_stack: + .skip 1024 +init_stack_top: + +.section ".rodata" +.align 2 + +/* define the heap end as read-only data containing the end defined in the + * linker script. other archs that use dynamic memory length discovery can make + * this read-write and update it during init. + */ +.global _heap_end +_heap_end: + .int _end_of_ram + diff --git a/arch/avr32/rules.mk b/arch/avr32/rules.mk index 879c6d4c..1187dae4 100644 --- a/arch/avr32/rules.mk +++ b/arch/avr32/rules.mk @@ -12,9 +12,9 @@ BOOTOBJS += \ OBJS += \ $(LOCAL_DIR)/ops.o \ $(LOCAL_DIR)/thread.o \ + $(LOCAL_DIR)/arch.o \ -# $(LOCAL_DIR)/arch.Ao \ - $(LOCAL_DIR)/asm.o \ +# $(LOCAL_DIR)/asm.o \ $(LOCAL_DIR)/cache.o \ $(LOCAL_DIR)/cache-ops.o \ $(LOCAL_DIR)/exceptions.o \ diff --git a/kernel/main.c b/kernel/main.c index e9c84adc..83ce38e7 100644 --- a/kernel/main.c +++ b/kernel/main.c @@ -58,6 +58,8 @@ static void call_constructors(void) void kmain(void) __NO_RETURN __EXTERNALLY_VISIBLE; void kmain(void) { + puts("top of kmain\n"); + // get us into some sort of thread context thread_init_early(); diff --git a/platform/at32ap7/debug.c b/platform/at32ap7/debug.c index 72b7a3da..22b344f2 100644 --- a/platform/at32ap7/debug.c +++ b/platform/at32ap7/debug.c @@ -29,77 +29,79 @@ #include #include #include +#include #if 0 static cbuf_t debug_buf; static timer_t debug_timer; +#endif -static void write_uart_reg(int uart, int reg, unsigned char data) +void write_uart_reg(int uart, int reg, unsigned char data) { unsigned long base; int mul = 4; switch(uart) { - case 0: base = UART0_BASE; break; - case 1: base = UART1_BASE; break; - case 2: base = UART2_BASE; break; + case 0: base = USART0_BASE; break; + case 1: base = USART1_BASE; break; + case 2: base = USART2_BASE; break; + case 3: base = USART3_BASE; break; default: return; } - *(volatile unsigned char *)(base + reg * mul) = data; + *REG32(base + reg * mul) = data; } -static unsigned char read_uart_reg(int uart, int reg) +unsigned char read_uart_reg(int uart, int reg) { unsigned long base; int mul = 4; switch(uart) { - case 0: base = UART0_BASE; break; - case 1: base = UART1_BASE; break; - case 2: base = UART2_BASE; break; + case 0: base = USART0_BASE; break; + case 1: base = USART1_BASE; break; + case 2: base = USART2_BASE; break; + case 3: base = USART3_BASE; break; default: return 0; } - return *(volatile unsigned char *)(base + reg * mul); + return *REG32(base + reg * mul); } static int uart_init(void) { /* clear the tx & rx fifo and disable */ - write_uart_reg(0, UART_FCR, 0x6); +// write_uart_reg(0, UART_FCR, 0x6); return 0; } -static int uart_putc(int port, char c ) +int uart_putc(int port, char c ) { - while (!(read_uart_reg(port, UART_LSR) & (1<<6))) // wait for the shift register to empty - ; +// while (!(read_uart_reg(port, UART_CSR) & (1<<9))) // wait for the shift register to empty +// ; write_uart_reg(port, UART_THR, c); +// *REG32(USART1_BASE + 0x1c) = c; return 0; } static int uart_getc(int port, bool wait) /* returns -1 if no data available */ { if (wait) { - while (!(read_uart_reg(port, UART_LSR) & (1<<0))) // wait for data to show up in the rx fifo + while (!(read_uart_reg(port, UART_CSR) & (1<<0))) // wait for data to show up in the rx fifo ; } else { - if (!(read_uart_reg(port, UART_LSR) & (1<<0))) + if (!(read_uart_reg(port, UART_CSR) & (1<<0))) return -1; } return read_uart_reg(port, UART_RHR); } -#endif void _dputc(char c) { -#if 0 if (c == '\n') - uart_putc(0, '\r'); - uart_putc(0, c); -#endif + uart_putc(1, '\r'); + uart_putc(1, c); } #if 0 @@ -124,6 +126,7 @@ int dgetc(char *c, bool wait) len = cbuf_read(&debug_buf, c, 1, wait); return len; #endif + return 0; } void debug_dump_regs(void) diff --git a/platform/at32ap7/include/platform/at32ap7.h b/platform/at32ap7/include/platform/at32ap7.h index 6e73cd4c..902a60b7 100644 --- a/platform/at32ap7/include/platform/at32ap7.h +++ b/platform/at32ap7/include/platform/at32ap7.h @@ -112,5 +112,22 @@ #define INT_USBA INT_VECTOR(31, 0) #define INT_EBI INT_VECTOR(32, 0) +/* UART */ +#define UART_CR (0) +#define UART_MR (1) +#define UART_IER (2) +#define UART_IDR (3) +#define UART_IMR (4) +#define UART_CSR (5) +#define UART_RHR (6) +#define UART_THR (7) +#define UART_BRGR (8) +#define UART_RTOR (9) +#define UART_TTGR (10) +#define UART_FIDI (16) +#define UART_NER (17) +#define UART_IFR (19) +#define UART_MAN (20) + #endif diff --git a/scripts/do-ngw100-test b/scripts/do-ngw100-test new file mode 100755 index 00000000..70042a10 --- /dev/null +++ b/scripts/do-ngw100-test @@ -0,0 +1,6 @@ +#!/bin/sh + +export PROJECT=ngw100-test + +make && +cp build-ngw100-test/lk.bin /tftproot/6300A8C0.img