[arch][arm] fix start.S to make sure r12 has 0 in it

2018-10-13 11:15:54 -07:00
parent 2680c377ec
commit 18d501fdcb
1 changed files with 1 additions and 0 deletions
--- a/arch/arm/arm/start.S
+++ b/arch/arm/arm/start.S
@@ -288,6 +288,7 @@ arm_reset:
    isb

    /* Write 0 to TTBCR */
+    mov     r12, #0
    mcr     p15, 0, r12, c2, c0, 2
    isb