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[arch][arm64][ops] add wmb/rmb barrier definitions

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Change-Id: I84c5b68c0911bdf071e3867095529c83448aaf30
This commit is contained in:
Michael Ryleev
2015-02-03 12:51:44 -08:00
committed by Arve Hjønnevåg
parent b22c0c8d5b
commit 110361e64f
1 changed files with 14 additions and 0 deletions
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14
arch/arm64/include/arch/arch_ops.h
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@@ -78,6 +78,20 @@ static inline bool arch_fiqs_disabled(void)
return !!state;
}
#define mb() __asm__ volatile("dsb sy" : : : "memory")
#define rmb() __asm__ volatile("dsb ld" : : : "memory")
#define wmb() __asm__ volatile("dsb st" : : : "memory")
#ifdef WITH_SMP
#define smp_mb() __asm__ volatile("dmb ish" : : : "memory")
#define smp_rmb() __asm__ volatile("dmb ishld" : : : "memory")
#define smp_wmb() __asm__ volatile("dmb ishst" : : : "memory")
#else
#define smp_mb() CF
#define smp_wmb() CF
#define smp_rmb() CF
#endif
static inline int atomic_add(volatile int *ptr, int val)
{
#if USE_GCC_ATOMICS