[arch][riscv] add a way for platforms to set optional riscv ISA extensions

A pretty simple mechanism, a list of extensions added to
RISCV_EXTENSION_LIST make variable is expanded to an underscore
delimited string appended to the end of -march=

Pretty simple but it should work for now.

platform/jh7110/rules.mk

@@ -10,6 +10,7 @@ SMP_MAX_CPUS ?= 4
 LK_HEAP_IMPLEMENTATION ?= dlmalloc
 RISCV_FPU ?= true
 RISCV_MMU ?= sv39
+RISCV_EXTENSION_LIST ?= zba zbb
 
 MODULE_DEPS += lib/cbuf
 MODULE_DEPS += lib/fdt