[arch][openrisc] fix up and get the OpenRISC port working again

Previous to now it had always relied on a custom patched gcc
and a custom sim. In the interim since the initial port went in
some time in 2015 GCC and QEMU have both officially picked up support
for the architecture and the machine that was emulated in the previous
emultor.

Using gcc 10.2 fix up the build and get it basically working. Timers
seem to not be working right but it's probably fairly easy to fix.

dev/timer/or1k_ticktimer/or1k_ticktimer.c

@@ -23,7 +23,7 @@ static uint32_t timer_freq;
 static volatile uint64_t ticks = 0;
 
 status_t platform_set_periodic_timer(platform_timer_callback callback, void *arg, lk_time_t interval) {
-    LTRACEF("cb %p, arg %p, interval %ld\n", callback, arg, interval);
+    LTRACEF("cb %p, arg %p, interval %u\n", callback, arg, interval);
 
     uint32_t ttmr = (uint64_t)timer_freq * interval / 1000;
     LTRACEF("count 0x%x\n", ttmr);