[platform][stm32] enabling selecting specific variants

platform/stm32f1xx/rules.mk

@@ -4,7 +4,6 @@ LOCAL_DIR := $(GET_LOCAL_DIR)
 ROMBASE := 0x0
 MEMBASE := 0x20000000
 # can be overridden by target
-MEMSIZE ?= 65536 
 
 ARCH := arm
 ARM_CPU := cortex-m3
@@ -12,11 +11,21 @@ ARM_CPU := cortex-m3
 ifeq ($(STM32_CHIP),stm32f107)
 DEFINES += \
 	STM32F10X_CL=1	
+MEMSIZE ?= 65536
 endif
-ifeq ($(STM32_CHIP),stm32f103)
+ifeq ($(STM32_CHIP),stm32f103_hd)
 DEFINES += \
 	STM32F10X_HD=1
+MEMSIZE ?= 65536
 endif
+ifeq ($(STM32_CHIP),stm32f103_md)
+DEFINES += \
+	STM32F10X_MD=1
+MEMSIZE ?= 20480
+endif
+
+DEFINES += \
+	MEMSIZE=$(MEMSIZE)
 
 INCLUDES += \
 	-I$(LOCAL_DIR)/include

platform/stm32f1xx/vectab.c

@@ -63,9 +63,12 @@ const void * const __SECTION(".text.boot.vectab2") vectab2[] =
     [TIM2_IRQn] = stm32_tim2_irq,
     [TIM3_IRQn] = stm32_tim3_irq,
     [TIM4_IRQn] = stm32_tim4_irq,
+
+#if defined(STM32F10X_HD) || defined(STM32F10X_HD_VL) || defined(STM32F10X_XL) || defined(STM32F10X_CL)
     [TIM5_IRQn] = stm32_tim5_irq,
     [TIM6_IRQn] = stm32_tim6_irq,
     [TIM7_IRQn] = stm32_tim7_irq,
+#endif
 
     [USART1_IRQn] = stm32_USART1_IRQ,
     [USART2_IRQn] = stm32_USART2_IRQ,

target/stm32-h103/rules.mk

@@ -1,6 +1,6 @@
 LOCAL_DIR := $(GET_LOCAL_DIR)
 
-STM32_CHIP := stm32f103
+STM32_CHIP := stm32f103_md
 
 PLATFORM := stm32f1xx
 

target/stm3210e/rules.mk

@@ -1,6 +1,6 @@
 LOCAL_DIR := $(GET_LOCAL_DIR)
 
-STM32_CHIP := stm32f103
+STM32_CHIP := stm32f103_hd
 
 PLATFORM := stm32f1xx