lk/target/stm32f746g-disco/rules.mk

LOCAL_DIR := $(GET_LOCAL_DIR)

MODULE := $(LOCAL_DIR)

STM32_CHIP := stm32f746

PLATFORM := stm32f7xx

SDRAM_SIZE := 0x00800000
SDRAM_BASE := 0xc0000000

GLOBAL_DEFINES += \
    ENABLE_UART1=1 \
    ENABLE_SDRAM=1 \
    USE_HSE_XTAL=1 \
    SDRAM_BASE=$(SDRAM_BASE) \
    SDRAM_SIZE=$(SDRAM_SIZE) \
    PLL_M_VALUE=8 \
    PLL_N_VALUE=336 \
    PLL_P_VALUE=2 \
\
    PKTBUF_POOL_SIZE=16


MODULE_SRCS += \
    $(LOCAL_DIR)/init.c \
    $(LOCAL_DIR)/lcd.c \
    $(LOCAL_DIR)/usb.c

MODULE_DEPS += \
    lib/gfx \
    dev/usb/class/bulktest

include make/module.mk
New target: stm32f746-disco It is close to the stm32746g-eval2-test.mk however - uart rx pin differs - no external sram - different lcd tech - (possibly) different sdram config 2015-08-24 15:33:05 -07:00			`LOCAL_DIR := $(GET_LOCAL_DIR)`

			`MODULE := $(LOCAL_DIR)`

			`STM32_CHIP := stm32f746`

			`PLATFORM := stm32f7xx`

[target][stm32f746g-disco] Use correct sdram size The board is sold with 128 Mbit device but upon closer inspection only 64 Mbit are wired. 2015-09-08 18:42:55 -07:00			`SDRAM_SIZE := 0x00800000`
New target: stm32f746-disco It is close to the stm32746g-eval2-test.mk however - uart rx pin differs - no external sram - different lcd tech - (possibly) different sdram config 2015-08-24 15:33:05 -07:00			`SDRAM_BASE := 0xc0000000`

			`GLOBAL_DEFINES += \`
			`ENABLE_UART1=1 \`
			`ENABLE_SDRAM=1 \`
Conditionally use HSE clock config. The stm32f7-discovery seems ok with the external xtal. 2015-09-01 16:00:35 -07:00			`USE_HSE_XTAL=1 \`
New target: stm32f746-disco It is close to the stm32746g-eval2-test.mk however - uart rx pin differs - no external sram - different lcd tech - (possibly) different sdram config 2015-08-24 15:33:05 -07:00			`SDRAM_BASE=$(SDRAM_BASE) \`
			`SDRAM_SIZE=$(SDRAM_SIZE) \`
			`PLL_M_VALUE=8 \`
			`PLL_N_VALUE=336 \`
[platform][stm32f7xx] Wire minip for the STM32f7 disco board. 2015-09-11 17:54:20 -07:00			`PLL_P_VALUE=2 \`
			`\`
[minip][pktbuf] Move pktbuf allocation to a common pool Rather than having a pool for pktbuf buffers and a pool for pktbufs, move them to a common pool. 2015-09-09 13:41:51 -07:00			`PKTBUF_POOL_SIZE=16`
[platform][stm32f7xx] Wire minip for the STM32f7 disco board. 2015-09-11 17:54:20 -07:00
New target: stm32f746-disco It is close to the stm32746g-eval2-test.mk however - uart rx pin differs - no external sram - different lcd tech - (possibly) different sdram config 2015-08-24 15:33:05 -07:00
			`MODULE_SRCS += \`
[target][stm32f7] Enable the LCD display Also add the gfx library so that the gfx tests commands work. 2015-09-22 16:40:19 -07:00			`$(LOCAL_DIR)/init.c \`
[platform][stm32f7xx][usbc] add driver for FS usb controller 2015-11-19 15:08:51 -08:00			`$(LOCAL_DIR)/lcd.c \`
			`$(LOCAL_DIR)/usb.c`
[target][stm32f7] Enable the LCD display Also add the gfx library so that the gfx tests commands work. 2015-09-22 16:40:19 -07:00
			`MODULE_DEPS += \`
[target][stm32f746g-disco] switch to the bulktest usb class driver 2015-12-09 16:27:57 -08:00			`lib/gfx \`
			`dev/usb/class/bulktest`
New target: stm32f746-disco It is close to the stm32746g-eval2-test.mk however - uart rx pin differs - no external sram - different lcd tech - (possibly) different sdram config 2015-08-24 15:33:05 -07:00
			`include make/module.mk`