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lk/make/macros.mk

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[build] add a few pseudo targets to assist with building list-arch and list-toolchain will compute and print the architecture and toolchain needed to build the project the build is set to. Used by the CI builder to decide what toolchain to grab.
2021-09-18 16:51:15 -07:00
# A collection of handy macros used all over the build system.
# This can be included anywhere and must not have any side effects.
initial commit of lk (little kernel) project
2008-09-01 02:26:09 -07:00
# Find the local dir of the make file
GET_LOCAL_DIR = $(patsubst %/,%,$(dir $(word $(words $(MAKEFILE_LIST)),$(MAKEFILE_LIST))))
# makes sure the target dir exists
MKDIR = if [ ! -d $(dir $@) ]; then mkdir -p $(dir $@); fi
[make] better modularize the build system -Each module's rules.mk defines a seperate linkage unit. Each module can have a private set of CFLAGS, DEFINES, INCLUDES, and so forth. -Files to be compiled are now added by source, not object. Most rules.mk files can be converted easily by following these steps: 1) add 'MODULE := $(LOCAL_DIR)' near the top of the file 2) change OBJS += to MODULE_SRCS += and list source files instead of .os 3) add 'include make/module.mk' at the bottom of the file See make/module.mk for directions.
2012-08-29 14:51:23 -07:00
# prepends the BUILD_DIR var to each item in the list
TOBUILDDIR = $(addprefix $(BUILDDIR)/,$(1))
[make][macro] Add definition of TOBOOL macro This macro converts specified variable to boolean true or false. Change-Id: I8e5a58a8bd0e241ac666213c931f596110bd08df
2015-03-04 17:40:25 -08:00
# converts specified variable to boolean value
TOBOOL = $(if $(filter-out 0 false,$1),true,false)
[make] put all of the global and local build switches in config.h files -now if you change any interesting build flags, the appropriate sources will be rebuilt
2012-09-23 18:48:11 -07:00
COMMA := ,
Fix incompatibility with Make 4.3. += does not prepend a space if the variable was empty. Source: https://lwn.net/Articles/810071/
2020-05-17 12:07:10 -07:00
E :=
SPACE := $E $E
[make] put all of the global and local build switches in config.h files -now if you change any interesting build flags, the appropriate sources will be rebuilt
2012-09-23 18:48:11 -07:00
[make] replace the config file generation logic with a much more efficient one Moves much of the text parsing logic into make itself.
2018-12-01 11:58:40 -08:00
# lower case and upper case translation
LC = $(subst A,a,$(subst B,b,$(subst C,c,$(subst D,d,$(subst E,e,$(subst F,f,$(subst G,g,$(subst H,h,$(subst I,i,$(subst J,j,$(subst K,k,$(subst L,l,$(subst M,m,$(subst N,n,$(subst O,o,$(subst P,p,$(subst Q,q,$(subst R,r,$(subst S,s,$(subst T,t,$(subst U,u,$(subst V,v,$(subst W,w,$(subst X,x,$(subst Y,y,$(subst Z,z,$1))))))))))))))))))))))))))
UC = $(subst a,A,$(subst b,B,$(subst c,C,$(subst d,D,$(subst e,E,$(subst f,F,$(subst g,G,$(subst h,H,$(subst i,I,$(subst j,J,$(subst k,K,$(subst l,L,$(subst m,M,$(subst n,N,$(subst o,O,$(subst p,P,$(subst q,Q,$(subst r,R,$(subst s,S,$(subst t,T,$(subst u,U,$(subst v,V,$(subst w,W,$(subst x,X,$(subst y,Y,$(subst z,Z,$1))))))))))))))))))))))))))
[make] add new TESTANDREPLACEFILE macro Split the MAKECONFIGHEADER macro into the part that generates the header and the part that tests if you should replace the target file with the generated one.
2013-07-31 11:47:03 -07:00
# test if two files are different, replacing the first
# with the second if so
# args: $1 - temporary file to test
# $2 - file to replace
define TESTANDREPLACEFILE
if [ -f "$2" ]; then \
[make] replace the config file generation logic with a much more efficient one Moves much of the text parsing logic into make itself.
2018-12-01 11:58:40 -08:00
if cmp -- "$1" "$2"; then \
rm -f -- $1; \
[make] add new TESTANDREPLACEFILE macro Split the MAKECONFIGHEADER macro into the part that generates the header and the part that tests if you should replace the target file with the generated one.
2013-07-31 11:47:03 -07:00
else \
[make] replace the config file generation logic with a much more efficient one Moves much of the text parsing logic into make itself.
2018-12-01 11:58:40 -08:00
mv -- $1 $2; \
[make] add new TESTANDREPLACEFILE macro Split the MAKECONFIGHEADER macro into the part that generates the header and the part that tests if you should replace the target file with the generated one.
2013-07-31 11:47:03 -07:00
fi \
else \
[make] replace the config file generation logic with a much more efficient one Moves much of the text parsing logic into make itself.
2018-12-01 11:58:40 -08:00
mv -- $1 $2; \
[make] add new TESTANDREPLACEFILE macro Split the MAKECONFIGHEADER macro into the part that generates the header and the part that tests if you should replace the target file with the generated one.
2013-07-31 11:47:03 -07:00
fi
endef
[make] replace the config file generation logic with a much more efficient one Moves much of the text parsing logic into make itself.
2018-12-01 11:58:40 -08:00
# replace all characters or sequences of letters in defines to convert to a proper C style variable
MAKECVAR=$(subst C++,CPP,$(subst -,_,$(subst /,_,$(subst .,_,$1))))
[make] better modularize the build system -Each module's rules.mk defines a seperate linkage unit. Each module can have a private set of CFLAGS, DEFINES, INCLUDES, and so forth. -Files to be compiled are now added by source, not object. Most rules.mk files can be converted easily by following these steps: 1) add 'MODULE := $(LOCAL_DIR)' near the top of the file 2) change OBJS += to MODULE_SRCS += and list source files instead of .os 3) add 'include make/module.mk' at the bottom of the file See make/module.mk for directions.
2012-08-29 14:51:23 -07:00
# generate a header file at $1 with an expanded variable in $2
[make] replace the config file generation logic with a much more efficient one Moves much of the text parsing logic into make itself.
2018-12-01 11:58:40 -08:00
# $3 provides an (optional) raw footer to append to the end
# NOTE: the left side of the variable will be upper cased and some symbols replaced
# to be valid C names (see MAKECVAR above).
# The right side of the #define can be any valid C but cannot contain spaces, even
# inside a string.
[make] better modularize the build system -Each module's rules.mk defines a seperate linkage unit. Each module can have a private set of CFLAGS, DEFINES, INCLUDES, and so forth. -Files to be compiled are now added by source, not object. Most rules.mk files can be converted easily by following these steps: 1) add 'MODULE := $(LOCAL_DIR)' near the top of the file 2) change OBJS += to MODULE_SRCS += and list source files instead of .os 3) add 'include make/module.mk' at the bottom of the file See make/module.mk for directions.
2012-08-29 14:51:23 -07:00
define MAKECONFIGHEADER
[make] replace echo commands with $(info) Seems to result in less forks since it doesn't need to run an echo binary.
2018-12-01 11:47:43 -08:00
$(info generating $1) \
[make] add new TESTANDREPLACEFILE macro Split the MAKECONFIGHEADER macro into the part that generates the header and the part that tests if you should replace the target file with the generated one.
2013-07-31 11:47:03 -07:00
$(MKDIR); \
[make] replace the config file generation logic with a much more efficient one Moves much of the text parsing logic into make itself.
2018-12-01 11:58:40 -08:00
echo '#pragma once' > $1.tmp; \
$(foreach var,$($(2)), \
echo \#define \
$(firstword $(subst =,$(SPACE),$(call MAKECVAR,$(call UC,$(var))))) \
$(if $(findstring =,$(var)),$(subst $(firstword $(subst =,$(SPACE),$(var)))=,,$(var))) \
>> $1.tmp;) \
echo $3 >> $1.tmp; \
[make] add new TESTANDREPLACEFILE macro Split the MAKECONFIGHEADER macro into the part that generates the header and the part that tests if you should replace the target file with the generated one.
2013-07-31 11:47:03 -07:00
$(call TESTANDREPLACEFILE,$1.tmp,$1)
[make] better modularize the build system -Each module's rules.mk defines a seperate linkage unit. Each module can have a private set of CFLAGS, DEFINES, INCLUDES, and so forth. -Files to be compiled are now added by source, not object. Most rules.mk files can be converted easily by following these steps: 1) add 'MODULE := $(LOCAL_DIR)' near the top of the file 2) change OBJS += to MODULE_SRCS += and list source files instead of .os 3) add 'include make/module.mk' at the bottom of the file See make/module.mk for directions.
2012-08-29 14:51:23 -07:00
endef
[make][clang] Do not add unsupported warning flags Currently, clang does not support the -Wno-nonnull-compare and -Wmaybe-uninitialized warning flags so this adds lots of unknown warning flag output for each compile job when not using GCC. This commit adds a makefile macro to check for supported warning flags and only adds them if the compiler actually supports them.
2021-12-09 10:59:09 +00:00
check_compiler_flag = $(shell $(CC) -c -xc /dev/null -o /dev/null $(1) 2>/dev/null && echo yes || echo no)
# Due to GCC's behaviour with regard to unknown warning flags this macro can
# only be used to detect warning-enable options (-Wfoo) but not for warning
# disable flags such as -Wno-foo.
# https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#:~:text=When%20an%20unrecognized%20warning%20option%20is%20requested
is_warning_flag_supported = $(strip \
$(if $(findstring -Wno-,$(1)),$(error "Cannot use -Wno- flags here: $(1)"),) \
$(if $(CC),,$(error "CC is not set, this macro cannot be used yet!")) \
$(if $($(call MAKECVAR,$(1))), \
$(info Using cached result for $(1): $($(call MAKECVAR,$(1)))), \
$(eval $(call MAKECVAR,$(1)) := $(call check_compiler_flag,-Werror -fsyntax-only $(1))) \
$(info Checking if $(1) is supported: $($(call MAKECVAR,$(1)))) \
)$($(call MAKECVAR,$(1))))
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